Electronic Design

EDA Update: C-To-VHDL High-Level Synthesis Tool

A C-TO-VHDL high-level synthesis tool is now downloadable from the Center for Embedded Computing Systems of the University of California, Irvine. Called SPARK, it takes the behavior of an application ...
EDN

Product how-to: Achieving STARC and DO-254 compliance using HDL Coder-generated code

HDL Coder generates target independent, synthesizable Verilog and VHDL code from MATLAB functions, Simulink models, and Stateflow charts. The generated HDL code is bit-true and cycle-accurate to ...
Semiconductor Engineering

The Evolution Of High-Level Synthesis

High-level synthesis is getting yet another chance to shine, this time from new markets and new technology nodes. But it’s still unclear how fully this technology will be used. Despite gains, it ...
Electronic Design

11 Myths About High-Level-Synthesis Techniques for Programming FPGAs

High-level synthesis to the rescue? You might be surprised at how hardware designers are getting new value from HLS when designing systems with FPGAs. The numbers of applications using FPGAs are on ...
Design-Reuse

Open-source Framework and Practical Considerations for Translating RTL VHDL to SystemC

SystemC has gained wide acceptance in the design of new digital IPs. However, there are numerous IPs already designed in VHDL. With the advances in SystemC ecosystem, like IEEE standardization, TLM-2 ...